Merge branch 'v0_2_some_fixes' into develop

Author: LourensVeen

ymmsl/v0_2/__init__.py

@@ -1,11 +1,11 @@
-from ymmsl.v0_1.checkpoint import (
+from ymmsl.v0_2.checkpoint import (
         CheckpointRule, CheckpointRangeRule, CheckpointAtRule, Checkpoints)
-from ymmsl.v0_1.component import Operator, Port, Ports
-from ymmsl.v0_1.execution import (
-        BaseEnv, ExecutionModel, MPICoresResReq, MPINodesResReq, ResourceRequirements,
-        ThreadedResReq, KeepsStateForNextUse)
-from ymmsl.v0_1.identity import Identifier, Reference, ReferencePart
-from ymmsl.v0_1.settings import Settings, SettingValue
+from ymmsl.v0_2.ports import Operator, Port, Ports
+from ymmsl.v0_2.program import BaseEnv, ExecutionModel, KeepsStateForNextUse
+from ymmsl.v0_2.identity import Identifier, Reference, ReferencePart
+from ymmsl.v0_2.resources import (
+        MPICoresResReq, MPINodesResReq, ResourceRequirements, ThreadedResReq)
+from ymmsl.v0_2.settings import Settings, SettingValue
 
 from ymmsl.v0_2.component import Component
 from ymmsl.v0_2.configuration import Configuration

ymmsl/v0_2/checkpoint.py

@@ -0,0 +1,2 @@
+from ymmsl.v0_1.checkpoint import (     # noqa: F401
+        CheckpointRule, CheckpointRangeRule, CheckpointAtRule, Checkpoints)

ymmsl/v0_2/component.py

@@ -2,8 +2,8 @@
 
 import yatiml
 
-from ymmsl.v0_1.component import Ports
-from ymmsl.v0_1.identity import Identifier, Reference
+from ymmsl.v0_2.ports import Ports
+from ymmsl.v0_2.identity import Identifier, Reference
 
 
 class Component:

ymmsl/v0_2/configuration.py

@@ -7,10 +7,10 @@
 import yatiml
 import yaml
 
-from ymmsl.v0_1.checkpoint import Checkpoints
-from ymmsl.v0_1.execution import ResourceRequirements
-from ymmsl.v0_1.identity import Reference
-from ymmsl.v0_1.settings import Settings
+from ymmsl.v0_2.checkpoint import Checkpoints
+from ymmsl.v0_2.resources import ResourceRequirements
+from ymmsl.v0_2.identity import Reference
+from ymmsl.v0_2.settings import Settings
 from ymmsl.v0_2.document import Document
 from ymmsl.v0_2.implementation import Implementation
 from ymmsl.v0_2.program import Program

ymmsl/v0_2/identity.py

@@ -0,0 +1 @@
+from ymmsl.v0_1.identity import Identifier, Reference, ReferencePart    # noqa: F401

ymmsl/v0_2/implementation.py

@@ -1,7 +1,7 @@
 from typing import Optional
 
-from ymmsl.v0_1.component import Ports
-from ymmsl.v0_1.identity import Reference
+from ymmsl.v0_2.ports import Ports
+from ymmsl.v0_2.identity import Reference
 
 
 class Implementation:

ymmsl/v0_2/model.py

@@ -3,8 +3,8 @@
 
 import yatiml
 
-from ymmsl.v0_1.component import Ports
-from ymmsl.v0_1.identity import Identifier, Reference
+from ymmsl.v0_2.ports import Ports
+from ymmsl.v0_2.identity import Identifier, Reference
 from ymmsl.v0_2.component import Component
 from ymmsl.v0_2.implementation import Implementation
 

ymmsl/v0_2/ports.py

@@ -0,0 +1 @@
+from ymmsl.v0_1.component import Operator, Port, Ports  # noqa: F401

ymmsl/v0_2/program.py

@@ -5,7 +5,7 @@
 import yaml
 import yatiml
 
-from ymmsl.v0_1.component import Ports
+from ymmsl.v0_2.ports import Ports
 from ymmsl.v0_1.execution import BaseEnv, ExecutionModel, KeepsStateForNextUse
 from ymmsl.v0_2.implementation import Implementation
 

ymmsl/v0_2/resources.py

@@ -0,0 +1,2 @@
+from ymmsl.v0_1.execution import (  # noqa: F401
+        MPICoresResReq, MPINodesResReq, ResourceRequirements, ThreadedResReq,)