diff --git a/arch/arm64/boot/dts/broadcom/rp1.dtsi b/arch/arm64/boot/dts/broadcom/rp1.dtsi
index 8847c32e1019f9..4c2a06cb85e86c 100644
--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
@@ -930,7 +930,7 @@
 			};
 
 			rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
-				function = "spi0";
+				function = "gpio";
 				pins = "gpio7", "gpio8";
 				bias-pull-up;
 			};
@@ -984,7 +984,7 @@
 			};
 
 			rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
-				function = "spi0";
+				function = "gpio";
 				pins = "gpio52", "gpio53";
 				bias-pull-up;
 			};
diff --git a/drivers/pinctrl/pinctrl-rp1.c b/drivers/pinctrl/pinctrl-rp1.c
index 7e8f5f600ea495..e26835a4e478fa 100644
--- a/drivers/pinctrl/pinctrl-rp1.c
+++ b/drivers/pinctrl/pinctrl-rp1.c
@@ -1333,6 +1333,12 @@ static int rp1_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
 	return 0;
 }
 
+static bool rp1_pmx_function_is_gpio(struct pinctrl_dev *pctldev,
+				     unsigned int selector)
+{
+	return selector == func_gpio;
+}
+
 static const struct pinmux_ops rp1_pmx_ops = {
 	.free = rp1_pmx_free,
 	.get_functions_count = rp1_pmx_get_functions_count,
@@ -1341,6 +1347,8 @@ static const struct pinmux_ops rp1_pmx_ops = {
 	.set_mux = rp1_pmx_set,
 	.gpio_disable_free = rp1_pmx_gpio_disable_free,
 	.gpio_set_direction = rp1_pmx_gpio_set_direction,
+	.function_is_gpio = rp1_pmx_function_is_gpio,
+	.strict = true,
 };
 
 static void rp1_pull_config_set(struct rp1_pin_info *pin, unsigned int arg)
@@ -1604,11 +1612,10 @@ static int rp1_pinctrl_probe(struct platform_device *pdev)
 	else if (pace_pin_updates &&
 		 of_device_is_compatible(rp1_node->parent, "brcm,bcm2712-pcie")) {
 		pc->dummy_base = of_iomap(rp1_node->parent, 0);
-		if (IS_ERR(pc->dummy_base)) {
+		if (!pc->dummy_base)
 			dev_warn(&pdev->dev, "could not map bcm2712 root complex registers\n");
-			pc->dummy_base = NULL;
-		}
 	}
+	of_node_put(rp1_node);
 
 	for (i = 0; i < RP1_NUM_BANKS; i++) {
 		const struct rp1_iobank_desc *bank = &rp1_iobanks[i];